1. Field of the Invention
The present invention relates to the field of intergrated circuits. More specifically, the invention relates to a structure for the protection of integrated circuits against polarity inversion of the substrate potential.
2. Discussion of the Related Art
VIPower (xe2x80x9cVertical Intelligent Power) denotes integrated circuits which, in a same chip, integrate one or more vertical power components (power bipolar transistors) and a circuitry (control circuitry) for controlling the switching of the power components.
VIPower integrated circuits typically comprise a common semiconductor substrate forming one electrode of the power component.
In VIPower integrated circuits, in order to electrically separate from each other and from the substrate the components of the control circuitry, a P type doped region (called an isolation region) is provided.
FIG. 1 shows in cross-section a portion of a control circuitry of a VIPower integrated circuit. On an N+ substrate 1, an Nxe2x88x92 layer 2 is epitaxially formed. A P type isolation region 3 is formed inside the Nxe2x88x92 layer 2. The P type isolation region 3 defines two isolated Nxe2x88x92 layer portions 4, 5 which are isolated from each other and from the Nxe2x88x92 layer 2. Inside Nxe2x88x92 layer portion 4 a PNP bipolar transistor T1 of the control circuitry is formed, while in the Nxe2x88x92 layer portion 5 an NPN bipolar transistor T2 of the control circuitry is formed.
By properly biasing the P type isolation region 3 at the ground potential (or, more generally, at the lowest potential existing in the integrated circuit), the PN junctions formed by the isolation region 3, the Nxe2x88x92 layer 2 and the Nxe2x88x92 layer portions 4, 5 are reverse-biased, so that electrical isolation is achieved. This is necessary in order to assure that parasitic bipolar transistors Qn1, Qn2, Qn3 are kept off.
In VIPower technology, the PN junction formed by the P type isolation region 3 and the Nxe2x88x92 layer 2 has a structure capable of sustaining high reverse voltages, typically of some hundreds of volts.
FIG. 2 is a schematic electrical diagram showing a possible use of a VIPower integrated circuit. Specifically, FIG. 2 depicts a circuit arrangement wherein a VIPower integrated circuit 8 is used for controlling a high-voltage IGBT (Insulated Gate Bipolar Transistor) 7. The VIPower integrated circuit chip 8 and the IGBT chip 7 are advantageously housed in a same package 6 and constitute a driver for a coil 9. In this arrangement the common N+ substrate of the VIPower integrated circuit 8 (N+ substrate 1 in FIG. 1) is electrically connected to the collector of the IGBT 7. In the example shown in FIG. 2, wherein an IGBT is used, the IGBT chip and the VIPower chip are advantageously housed in a same package. This is only an example. If the power device used to drive the coil were a power bipolar transistor, which can be directly integrated in the VIPower chip, the VIPower chip can directly drive the coil, without the need of having an IGBT chip.
Externally, the package 6 appears as a three-terminal device having a control terminal 10 (receiving a control or trigger signal TRIGGER, typically a logic signal switching between ground and 5 V) and two drive terminals 11, 12. Terminal 12 is connected to a first battery pole, providing a reference potential (ground). Terminal 11 is connected to a first terminal of the coil 9, the second terminal of the coil 9 being connected to a second battery pole BAT which, in normal operating conditions, is at a potential higher than that of the first pole.
Referring to the circuit arrangement of FIG. 2, it is necessary to guarantee that in case the polarity of the battery is inadvertently inverted the VIPower integrated circuit is not destroyed. Typical battery voltages have values up to 24 V. So, the VIPower integrated circuit must be capable of sustaining reverse voltages of xe2x88x9224 V without being damaged.
The IGBT inherently has a structure capable of sustaining such reverse voltages. By contrast, as far as the control circuitry is concerned, if the P type isolation region 3 is kept biased at the ground voltage as usual, and if the polarity of the battery were inadvertently inverted, the PN junction between the P type isolation region and the substrate would be forward biased, which would cause the destruction of the VIPower integrated circuit.
The same problem is encountered even if the IGBT is not provided, and the power component (power bipolar transistor) directly integrated in the VIPower chip is used to directly drive the coil.
It is thus necessary to properly bias the P type isolation region, so as to assure that not only the components of the control circuitry are electrically isolated from each other and from the substrate, but also the possibility of an inversion of the polarity of the substrate potential.
A known solution is described in U.S. Pat. No. 5,382,837. FIG. 3 is an electrical equivalent circuit of such a solution. FIG. 4 is a circuit diagram similar to that of FIG. 3, showing a possible practical implementation of the circuit of FIG. 3. With reference to FIG. 3, the isolation region (ISO) of the control circuitry of the VIPower integrated circuit is connected to the common collectors of two NPN bipolar transistors Q1, Q2. Transistor Q1 has the emitter connected to ground, transistor Q2 has the emitter connected to the substrate (SUB) of the VIPower integrated circuit. The base of transistor Q1 is connected through a bias resistor R1 to a voltage supply Vd. The base of transistor Q2 is kept at a constant pre-set bias voltage by a bias circuit 13, a possible implementation of which is shown in FIG. 4. All the transistors that are connected to the substrate of the VIPower integrated circuit, such as Q2 in FIGS. 3 and 4, are high-voltage vertical transistors whose emitter coincides with the substrate and whose base is a P type doped region similar to but isolated from the P type isolation region of the control circuitry of the VIPower integrated circuit.
In the circuits of FIGS. 3 and 4, in normal operating conditions, when the potential of the substrate (SUB) is positive, transistor Q2 is off and transistor Q1, in saturation, biases the isolation region (ISO) at VCE,sat(Q1). If the substrate potential goes negative, transistor Q2, whose base current is supplied by transistor Q3 (FIG. 4), goes into saturation, so that the isolation region ISO is biased at a voltage equal to the negative potential of the substrate plus VCE,sat(Q2).
The drawback of the circuits shown in FIGS. 3 and 4 is that they require a supply voltage Vd for their operation. On the contrary, in the arrangement of FIG. 2, the control signal TRIGGER which determines the coil charge time, is also used as a supply voltage for the control circuitry of the VIPower integrated circuit. Signal TRIGGER is not activated when an inadvertent inversion of the battery polarity can take place, so that in this condition the VIPower circuit lacks a voltage supply. Consequently, the circuits of FIGS. 3 and 4 cannot be used, because there is no supply voltage Vd.
In view of the state of art described, it is an object of the present invention to provide a structure not affected by the above-mentioned drawbacks.
According to the present invention, this and other objects are achieved by an integrated circuit including a vertical power component having a terminal formed by a chip substrate of a first conductivity type, a control circuit thereof, the control circuit isolated from the substrate by an isolation region of a second conductivity type, and a protection structure against polarity inversion of a substrate potential, comprising a first bipolar transistor with an emitter connected to said isolation region and a collector connected to a reference potential input of the integrated circuit, a bias circuit for biasing the first bipolar transistor in a reverse saturated mode when the substrate potential is higher than the reference potential, and a second bipolar transistor with an emitter connected to the substrate and a base coupled to the isolation region for coupling the isolation region to the substrate through a high-impedance when the substrate potential is lower than the reference potential.